1. Field of the Invention
The present invention relates generally to an interface apparatus and a packet transfer method for transferring commands and data in the form of packets between a host and a device, and, more particularly, to an interface apparatus and a packet transfer method for transferring the packets by connecting the host and the device via a serial transmission line.
2. Description of the Related Arts
Traditionally, an ATA interface (AT Attachment Interface) using a parallel transmission line has been a mainstream of an interface between a host computer and a device such as a hard disk drive, but recently, in order to accommodate for the speeding up of interfaces and the expansion of capacities of hard disk drives, practical application of the serial ATA interface (SATA) using a serial transmission line is being promoted.
However, for a write access or a read access from a host to a hard disk drive which is on a device side in the conventional parallel ATA interface, even if the host issues an new command during a series of transmission sequences from the issuance of a write command or a read command to the termination of data transfer, the command newly issued by the host has to wait until the data transfer based on the command is completed. This is because the conventional parallel ATA interface employs a configuration in which the host and the device refer to the same task file register, and since only one (1) task file register is disposed at an interface circuit on the device side, if a next command is accepted during data transfer, the content of the task file register executing a current command will be destroyed. For this reason, the next command can not be accepted during data transfer, and in order to accept the next command during data transfer, only one approach is to forcibly cancel the data transfer in execution to accept the next command. Also in the serial ATA interface which is currently coming into practical use, basically the same concept as that of the conventional parallel ATA interface is diverted, and therefore, a single task file register is disposed on the device side. Thus, in the serial ATA interface as well, the next command can not be received during data transfer, as in the case of the conventional parallel ATA interface. Further, in the conventional parallel ATA interface, if the method is employed such that the currently executed data transfer is cancelled to accept the next command, since the determination to cancel the command processing is performed by hardware, only the cases assumed in advance can be accommodated, and therefore there is a problem that flexibility to the cases which are not assumed is less than when firmware performs it, and exactly the same problem will occur when this is diverted to the serial ATA Interface.